// miniport.h
typedef struct _PCI_EXPRESS_AER_CAPABILITY {
PCI_EXPRESS_ENHANCED_CAPABILITY_HEADER Header;
PCI_EXPRESS_UNCORRECTABLE_ERROR_STATUS UncorrectableErrorStatus;
PCI_EXPRESS_UNCORRECTABLE_ERROR_MASK UncorrectableErrorMask;
PCI_EXPRESS_UNCORRECTABLE_ERROR_SEVERITY UncorrectableErrorSeverity;
PCI_EXPRESS_CORRECTABLE_ERROR_STATUS CorrectableErrorStatus;
PCI_EXPRESS_CORRECTABLE_ERROR_MASK CorrectableErrorMask;
PCI_EXPRESS_AER_CAPABILITIES CapabilitiesAndControl;
ULONG HeaderLog[4];
PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_STATUS SecUncorrectableErrorStatus;
PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_MASK SecUncorrectableErrorMask;
PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_SEVERITY SecUncorrectableErrorSeverity;
PCI_EXPRESS_SEC_AER_CAPABILITIES SecCapabilitiesAndControl;
ULONG SecHeaderLog[4];
} PCI_EXPRESS_AER_CAPABILITY, *PPCI_EXPRESS_AER_CAPABILITY;
View the official Windows Driver Kit DDI reference// wdm.h
typedef struct _PCI_EXPRESS_AER_CAPABILITY {
PCI_EXPRESS_ENHANCED_CAPABILITY_HEADER Header;
PCI_EXPRESS_UNCORRECTABLE_ERROR_STATUS UncorrectableErrorStatus;
PCI_EXPRESS_UNCORRECTABLE_ERROR_MASK UncorrectableErrorMask;
PCI_EXPRESS_UNCORRECTABLE_ERROR_SEVERITY UncorrectableErrorSeverity;
PCI_EXPRESS_CORRECTABLE_ERROR_STATUS CorrectableErrorStatus;
PCI_EXPRESS_CORRECTABLE_ERROR_MASK CorrectableErrorMask;
PCI_EXPRESS_AER_CAPABILITIES CapabilitiesAndControl;
ULONG HeaderLog[4];
PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_STATUS SecUncorrectableErrorStatus;
PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_MASK SecUncorrectableErrorMask;
PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_SEVERITY SecUncorrectableErrorSeverity;
PCI_EXPRESS_SEC_AER_CAPABILITIES SecCapabilitiesAndControl;
ULONG SecHeaderLog[4];
} PCI_EXPRESS_AER_CAPABILITY, *PPCI_EXPRESS_AER_CAPABILITY;
View the official Windows Driver Kit DDI referenceNo description available.
The PCI_EXPRESS_AER_CAPABILITY structure describes a PCI Express (PCIe) advanced error reporting capability structure.
HeaderA PCI_EXPRESS_ENHANCED_CAPABILITY_HEADER structure that describes the header for this structure.
UncorrectableErrorStatusA PCI_EXPRESS_UNCORRECTABLE_ERROR_STATUS structure that describes the PCIe uncorrectable error status register of the PCIe AER capability structure.
UncorrectableErrorMaskA PCI_EXPRESS_UNCORRECTABLE_ERROR_MASK structure that describes the PCIe uncorrectable error mask register of the PCIe AER capability structure.
UncorrectableErrorSeverityA PCI_EXPRESS_UNCORRECTABLE_ERROR_SEVERITY structure that describes the PCIe uncorrectable error severity register of the PCIe AER capability structure.
CorrectableErrorStatusA PCI_EXPRESS_UNCORRECTABLE_ERROR_STATUS structure that describes the PCIe uncorrectable error status register of the PCIe AER capability structure.
CorrectableErrorMaskA PCI_EXPRESS_UNCORRECTABLE_ERROR_MASK structure that describes the PCIe uncorrectable error mask register of the PCIe AER capability structure.
CapabilitiesAndControlA PCI_EXPRESS_AER_CAPABILITIES structure that describes the PCIe advanced error capabilities and control register of the PCIe AER capability structure.
HeaderLogAn array of four 32-bit values that together contain the header for the transaction layer packet (TLP) that corresponds to a detected error.
Within each 32-bit value in the array, the bytes of the TLP are in big-endian byte order.
SecUncorrectableErrorStatusA PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_STATUS structure that describes the PCIe secondary uncorrectable error status register of the PCIe AER capability structure.
SecUncorrectableErrorMaskA PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_MASK structure that describes the PCIe secondary uncorrectable error mask register of the PCIe AER capability structure.
SecUncorrectableErrorSeverityA PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_SEVERITY structure that describes the PCIe secondary uncorrectable error severity register of the PCIe AER capability structure.
SecCapabilitiesAndControlA PCI_EXPRESS_SEC_AER_CAPABILITIES structure that describes the PCIe secondary error capabilities and control register of the PCIe AER capability structure.
SecHeaderLogAn array of four 32-bit values that together contain the header for the transaction on the secondary interface that generated an error.
PCIe bridge devices use the PCI_EXPRESS_BRIDGE_AER_CAPABILITY structure instead of the PCI_EXPRESS_AER_CAPABILITY structure to describe the PCIe advanced error reporting capability structure.
Root ports and root complex event collectors use the PCI_EXPRESS_ROOTPORT_AER_CAPABILITY structure instead of the PCI_EXPRESS_AER_CAPABILITY structure to describe the PCIe advanced error reporting capability structure.
For additional information about the PCIe advanced error reporting capability structure, see the PCI Express Specification.
PCI_EXPRESS_CORRECTABLE_ERROR_STATUS
PCI_EXPRESS_UNCORRECTABLE_ERROR_SEVERITY
PCI_EXPRESS_UNCORRECTABLE_ERROR_MASK
PCI_EXPRESS_ENHANCED_CAPABILITY_HEADER
PCI_EXPRESS_BRIDGE_AER_CAPABILITY
PCI_EXPRESS_UNCORRECTABLE_ERROR_STATUS
PCI_EXPRESS_ROOTPORT_AER_CAPABILITY
PCI_EXPRESS_CORRECTABLE_ERROR_MASK
The PCI_EXPRESS_AER_CAPABILITY structure describes a PCI Express (PCIe) advanced error reporting capability structure.
HeaderA PCI_EXPRESS_ENHANCED_CAPABILITY_HEADER structure that describes the header for this structure.
UncorrectableErrorStatusA PCI_EXPRESS_UNCORRECTABLE_ERROR_STATUS structure that describes the PCIe uncorrectable error status register of the PCIe AER capability structure.
UncorrectableErrorMaskA PCI_EXPRESS_UNCORRECTABLE_ERROR_MASK structure that describes the PCIe uncorrectable error mask register of the PCIe AER capability structure.
UncorrectableErrorSeverityA PCI_EXPRESS_UNCORRECTABLE_ERROR_SEVERITY structure that describes the PCIe uncorrectable error severity register of the PCIe AER capability structure.
CorrectableErrorStatusA PCI_EXPRESS_CORRECTABLE_ERROR_STATUS structure that describes the PCIe correctable error status register of the PCIe AER capability structure.
CorrectableErrorMaskA PCI_EXPRESS_CORRECTABLE_ERROR_MASK structure that describes the PCIe correctable error mask register of the PCIe AER capability structure.
CapabilitiesAndControlA PCI_EXPRESS_AER_CAPABILITIES structure that describes the PCIe advanced error capabilities and control register of the PCIe AER capability structure.
HeaderLogAn array of four 32-bit values that together contain the header for the transaction layer packet (TLP) that corresponds to a detected error.
Within each 32-bit value in the array, the bytes of the TLP are in big-endian byte order.
SecUncorrectableErrorStatusA PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_STATUS structure that describes the PCIe secondary uncorrectable error status register of the PCIe AER capability structure.
SecUncorrectableErrorMaskA PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_MASK structure that describes the PCIe secondary uncorrectable error mask register of the PCIe AER capability structure.
SecUncorrectableErrorSeverityA PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_SEVERITY structure that describes the PCIe secondary uncorrectable error severity register of the PCIe AER capability structure.
SecCapabilitiesAndControlA PCI_EXPRESS_SEC_AER_CAPABILITIES structure that describes the PCIe secondary error capabilities and control register of the PCIe AER capability structure.
SecHeaderLogAn array of four 32-bit values that together contain the header for the transaction on the secondary interface that generated an error.
typedef struct _PCI_EXPRESS_AER_CAPABILITY {
PCI_EXPRESS_ENHANCED_CAPABILITY_HEADER Header;
PCI_EXPRESS_UNCORRECTABLE_ERROR_STATUS UncorrectableErrorStatus;
PCI_EXPRESS_UNCORRECTABLE_ERROR_MASK UncorrectableErrorMask;
PCI_EXPRESS_UNCORRECTABLE_ERROR_SEVERITY UncorrectableErrorSeverity;
PCI_EXPRESS_CORRECTABLE_ERROR_STATUS CorrectableErrorStatus;
PCI_EXPRESS_CORRECTABLE_ERROR_MASK CorrectableErrorMask;
PCI_EXPRESS_AER_CAPABILITIES CapabilitiesAndControl;
ULONG HeaderLog[4];
PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_STATUS SecUncorrectableErrorStatus;
PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_MASK SecUncorrectableErrorMask;
PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_SEVERITY SecUncorrectableErrorSeverity;
PCI_EXPRESS_SEC_AER_CAPABILITIES SecCapabilitiesAndControl;
ULONG SecHeaderLog[4];
} PCI_EXPRESS_AER_CAPABILITY, *PPCI_EXPRESS_AER_CAPABILITY;
PCIe bridge devices use the PCI_EXPRESS_BRIDGE_AER_CAPABILITY structure instead of the PCI_EXPRESS_AER_CAPABILITY structure to describe the PCIe advanced error reporting capability structure.
Root ports and root complex event collectors use the PCI_EXPRESS_ROOTPORT_AER_CAPABILITY structure instead of the PCI_EXPRESS_AER_CAPABILITY structure to describe the PCIe advanced error reporting capability structure.
For additional information about the PCIe advanced error reporting capability structure, see the PCI Express Specification.
PCI_EXPRESS_CORRECTABLE_ERROR_STATUS
PCI_EXPRESS_UNCORRECTABLE_ERROR_SEVERITY
PCI_EXPRESS_UNCORRECTABLE_ERROR_MASK
PCI_EXPRESS_ENHANCED_CAPABILITY_HEADER
PCI_EXPRESS_BRIDGE_AER_CAPABILITY
PCI_EXPRESS_UNCORRECTABLE_ERROR_STATUS
PCI_EXPRESS_ROOTPORT_AER_CAPABILITY
PCI_EXPRESS_CORRECTABLE_ERROR_MASK